Title :
A bias dependent source/drain resistance model in LDD MOSFET devices for distortion analysis
Author :
Oh, Kwang-Hoon ; Yu, Zhiping ; Dutton, Robert W.
Author_Institution :
Center for Integrated Syst., Stanford Univ., CA, USA
Abstract :
In order to describe nonlinear distortion behavior precisely, an equivalent resistance model for n- source/drain regions of an LDD MOSFET featuring gate bias and drain bias dependence is implemented. Separating the LDD device into an intrinsic MOSFET and two buried channel (BC) MOSFETs, a resistance model has been developed in a physically consistent manner. The proposed resistance model was confirmed using 2D device simulation results and its viability for distortion analysis has been investigated
Keywords :
MOSFET; electric resistance; equivalent circuits; nonlinear distortion; semiconductor device models; 2D device simulation; LDD MOSFET devices; bias dependent source/drain resistance model; buried channel MOSFETs; distortion analysis; drain bias dependence; equivalent resistance model; gate bias dependence; intrinsic MOSFET; lightly doped drain; n- source/drain regions; nonlinear distortion behavior; Analytical models; Capacitance; Channel bank filters; Doping; Electronic mail; FETs; Linearity; MOSFET circuits; Nonlinear distortion; Voltage;
Conference_Titel :
VLSI and CAD, 1999. ICVC '99. 6th International Conference on
Conference_Location :
Seoul
Print_ISBN :
0-7803-5727-2
DOI :
10.1109/ICVC.1999.820870
