Compact VLSI neural network circuit with high-capacity dynamic synapses

Author

Park, Yoondong ; Liaw, J.-S. ; Sheu, B.J. ; Berger, T.W.

Author_Institution

Center for Neural Eng., Univ. of Southern California, Los Angeles, CA, USA

Volume

4

fYear

2000

fDate

2000

Firstpage

214

Abstract

Low-power low-voltage mixed-analog/digital-signal CMOS technology is used in implementing a novel dynamic-synapse neural network microchip. A basic building block for dynamic process is implemented with a variable current source, resistors, charging/discharging capacitances, and transmission gates. It was designed and simulated in 0.35 μm technology. The dynamic synapse function is implemented with resistor-capacitor exponential circuits, analog summing circuit, voltage comparator with hysteresis, and digital logic block. A neural network system with six input neurons, two output neurons, and 18 synapses is designed. Each neuron and dynamic synapse has individual threshold and gain. The circuit was simulated with two different input pulses to evaluate feedback inhibitory pulses, each action potential, and EPSP (excitatory post synaptic potential) of each dynamic processing point. Simulation results show that this dynamic synapse can be used for advanced neural processing including speech recognition application

Keywords

CMOS integrated circuits; VLSI; circuit simulation; integrated circuit design; low-power electronics; mixed analogue-digital integrated circuits; neural chips; 0.35 mum; EPSP evaluation; action potential evaluation; analog summing circuit; compact VLSI neural network circuit; digital logic block; dynamic-synapse neural network microchip; excitatory post synaptic potential evaluation; feedback inhibitory pulse evaluation; high-capacity dynamic synapses; hysteresis; low-power low-voltage mixed-analog/digital-signal CMOS technology; resistor-capacitor exponential circuits; speech recognition application; transmission gates; variable charging capacitances; variable current source; variable discharging capacitances; voltage comparator; CMOS technology; Capacitance; Circuit simulation; Neural networks; Neurons; Pulse circuits; Resistors; Summing circuits; Very large scale integration; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Neural Networks, 2000. IJCNN 2000, Proceedings of the IEEE-INNS-ENNS International Joint Conference on

Conference_Location

Como

ISSN

1098-7576

Print_ISBN

0-7695-0619-4

Type

conf

DOI

10.1109/IJCNN.2000.860775

Filename

860775