Teaching IP core development: an example

Author

Milenkovic, Aleksandar ; Fatzer, David

Author_Institution

Dept. of Electr. & Comput. Eng., Alabama Univ., Huntsville, AL, USA

fYear

2003

fDate

1-2 June 2003

Firstpage

16

Lastpage

17

Abstract

The increasing gap between design productivity and chip complexity, and emerging systems-on-a-chip (SoC) have led to the wide utilization of reusable intellectual property (IP) cores. Educators´ responsibility is to provide future generations of SoC architects with knowledge necessary for successful design and use of IP cores, and to offer them a system perspective including both hardware and software. One way to accomplish this goal is through projects focused on soft CPU cores development. In this paper, we show the design flow and give the details of one such project aimed to develop a Microchip´s PIC18 microcontroller core and implement it on an FPGA.

Keywords

design engineering; field programmable gate arrays; hardware description languages; industrial property; integrated circuit design; microcontrollers; system-on-chip; teaching; FPGA; IP core development; PIC18 microcontroller; SOC architects; central processing unit; chip complexity; design flow; design productivity; field programmable gate array; hardware description languages; intellectual property; soft CPU cores; system-on-chip; teaching; Design engineering; Education; Field programmable gate arrays; Hardware design languages; Integrated circuit synthesis; Logic design; Microcontrollers; Productivity; Registers; System-on-a-chip;

fLanguage

English

Publisher

ieee

Conference_Titel

Microelectronic Systems Education, 2003. Proceedings. 2003 IEEE International Conference on

Print_ISBN

0-7695-1973-3

Type

conf

DOI

10.1109/MSE.2003.1205234

Filename

1205234