• DocumentCode
    3529762
  • Title

    Teaching trade-offs in system-level design methodologies

  • Author

    Sakiyama, K. ; Schaumont, P. ; Hwang, D. ; Verbauwhede, I.

  • Author_Institution
    Dept. of Electr. Eng., California Univ., Los Angeles, CA, USA
  • fYear
    2003
  • fDate
    2003
  • Firstpage
    62
  • Lastpage
    63
  • Abstract
    This paper summarizes two graduate-level class projects in EE201A/EE298 (VLSI Architectures and Design Methods) at the University of California, Los Angeles (UCLA). The purpose of the class is to explore the impact of system-level optimization for various target platforms using EDA.
  • Keywords
    VLSI; electronic design automation; electronic engineering education; teaching; EDA; EE201A/EE298; Los Angeles; VLSI architectures; electronic design automation; graduate level class projects; system level design methodology; system level optimization; teaching tradeoff; university of California; very large scale integration; Design methodology; Digital signal processing; Education; Linear predictive coding; Signal design; Signal processing; Signal synthesis; Speech synthesis; Springs; System-level design;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Microelectronic Systems Education, 2003. Proceedings. 2003 IEEE International Conference on
  • Print_ISBN
    0-7695-1973-3
  • Type

    conf

  • DOI
    10.1109/MSE.2003.1205256
  • Filename
    1205256
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3529762