Design of GaAs MMIC transistors for the low-power low noise applications

Author

Nosal, Z.M.

Author_Institution

Inst. of Electron. Syst., Warsaw Univ. of Technol., Poland

Volume

1

fYear

2000

fDate

11-16 June 2000

Firstpage

13

Abstract

The paper investigates the problem of minimizing bias power for low noise GaAs amplifiers. The model of the amplifier parameters versus transistor gate width is presented and used to derive the conditions for noise optimization. It is shown that optimum FETs are rather wide and may operate at very low current densities. Complete amplifier stages with only 3-5 mW bias power are feasible at 2 GHz with noise figures below 1 dB.

Keywords

HEMT integrated circuits; III-V semiconductors; MMIC amplifiers; UHF amplifiers; UHF field effect transistors; UHF integrated circuits; equivalent circuits; field effect MMIC; gallium arsenide; high electron mobility transistors; low-power electronics; microwave field effect transistors; semiconductor device models; semiconductor device noise; 1 dB; 2 GHz; 3 to 5 mW; GaAs; GaAs LNAs; GaAs MMIC transistors; amplifier parameters; bias power minimisation; current densities; low noise amplifiers; low noise applications; low-power applications; noise optimization; transistor gate width; Circuit noise; Gallium arsenide; Impedance; Low-frequency noise; Low-noise amplifiers; MMICs; Microwave FETs; Microwave transistors; Noise figure; Power system modeling;

fLanguage

English

Publisher

ieee

Conference_Titel

Microwave Symposium Digest. 2000 IEEE MTT-S International

Conference_Location

Boston, MA, USA

ISSN

0149-645X

Print_ISBN

0-7803-5687-X

Type

conf

DOI

10.1109/MWSYM.2000.860872

Filename

860872