RFIC loadpull simulations implementing best practice RF and mixed-signal design using an integrated agilent and cadence EDA tool

Author

Mukherjee, Jayanta ; Parry, Jason ; Dai, Wenhua ; Roblin, Patrick ; Bibyk, Steven ; Lee, Jongsoo

Author_Institution

Dept. of Electr. Eng., Ohio State Univ., Columbus, OH, USA

fYear

2003

fDate

1-2 June 2003

Firstpage

76

Lastpage

77

Abstract

This paper describes the use of the newly developed Cadence to ADS dynamic link in loadpull simulations for BiCMOS RFIC design in a University environment. The process described here helps a designer achieve an integrated design environment where both RF design and traditional VLSI design principles can be applied in an integrated manner.

Keywords

BiCMOS integrated circuits; circuit simulation; electronic design automation; integrated circuit design; mixed analogue-digital integrated circuits; radiofrequency integrated circuits; ADS dynamic link; BiCMOS RFIC design; Cadence EDA tool; RF integrated circuit design; RFIC loadpull simulation; VLSI design; bipolar CMOS; circuit simulation; complementary metal-oxide-semiconductor; electronic design automation; mixed signal design; very large scale integration; Best practices; BiCMOS integrated circuits; CMOS technology; Computational modeling; Electronic design automation and methodology; Integrated circuit modeling; Noise figure; Radio frequency; Radiofrequency integrated circuits; Very large scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

Microelectronic Systems Education, 2003. Proceedings. 2003 IEEE International Conference on

Print_ISBN

0-7695-1973-3

Type

conf

DOI

10.1109/MSE.2003.1205262

Filename

1205262