• DocumentCode
    3530212
  • Title

    A toggle-type peak hold circuit for local power supply noise detection

  • Author

    Tamaki, Yuki ; Nakura, Toru ; Ikeda, Makoto ; Asada, Kunihiro

  • Author_Institution
    Dept. of Electron. Eng. & Inf. Syst., Univ. of Tokyo, Tokyo, Japan
  • fYear
    2010
  • fDate
    3-4 Aug. 2010
  • Firstpage
    29
  • Lastpage
    32
  • Abstract
    In this paper, a new peak hold circuit which detects the top value and the bottom value of the power supply noise of a VLSI circuit is proposed. We can make a noise map by distributing the circuit over the chip and find hot-spots in which large power supply noise occurs. This circuit needs no extra clean power supply or external clock signal. Also, low power consumption can be expected because it is composed simple and small. Our circuit can hold both the top peak value and bottom peak value by changing only one gate logic. Moreover, our circuit has a mechanism of DC offset cancellation. This circuit has a resolution of 10mV at 100MHz. The output value from two or more circuits can be transmitted via a shared single wire. HSPICE simulation using a 0.18μm CMOS process technology validates its operation.
  • Keywords
    CMOS integrated circuits; VLSI; logic gates; low-power electronics; power supply circuits; CMOS process technology; DC offset cancellation; HSPICE simulation; VLSI circuit; frequency 100 MHz; gate logic; local power supply noise detection; low power consumption; size 0.18 mum; toggle-type peak hold circuit; voltage 10 mV; CMOS logic circuits; Circuit noise; Clocks; Energy consumption; Logic circuits; Logic gates; Power supplies; Signal resolution; Very large scale integration; Wire;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Quality Electronic Design (ASQED), 2010 2nd Asia Symposium on
  • Conference_Location
    Penang
  • Print_ISBN
    978-1-4244-7809-5
  • Type

    conf

  • DOI
    10.1109/ASQED.2010.5548160
  • Filename
    5548160