DocumentCode
3530393
Title
Towards planar processing for InP DHBTs
Author
Kopf, R.F. ; Sung, W.J. ; Weimann, N.G. ; Chen, Y.K. ; Houtsma, V. ; Yang, Y.
Author_Institution
Lucent Technol. Bell Labs., Murray Hill, NJ, USA
fYear
2003
fDate
12-16 May 2003
Firstpage
57
Lastpage
60
Abstract
Silicon-like planar InP DHBTs have always been the goal for researchers to enhance their integration capabilities. In addition, heat dissipation for large-scale device integration will be an issue for the traditional mesa DHBT structure while maintaining high-speed performance. We demonstrate that by developing ion-implantation technologies, planar InP DHBTs can be built successfully.
Keywords
III-V semiconductors; cooling; heterojunction bipolar transistors; indium compounds; ion implantation; semiconductor doping; thermal conductivity; InP; InP DHBTs; heat dissipation; integration capabilities; large-scale device integration; planar processing; Capacitance; Doping profiles; Double heterojunction bipolar transistors; Indium phosphide; Large scale integration; Performance evaluation; Rapid thermal annealing; Substrates; Temperature; Thermal conductivity;
fLanguage
English
Publisher
ieee
Conference_Titel
Indium Phosphide and Related Materials, 2003. International Conference on
Print_ISBN
0-7803-7704-4
Type
conf
DOI
10.1109/ICIPRM.2003.1205311
Filename
1205311
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