DocumentCode :
3531414
Title :
Aggressive Scheduling and Speculation in Multithreaded Architectures: Is it Worth its Salt?
Author :
Loew, Jason ; Ponomarev, Dmitry
Author_Institution :
Binghamton Univ., Binghamton, NY
fYear :
2008
fDate :
Oct. 29 2008-Nov. 1 2008
Firstpage :
11
Lastpage :
18
Abstract :
This paper investigates and quantifies the impacts of several aggressive performance-boosting techniques designed for superscalar processors on the performance of SMT architectures. First, we examine the synergy of multithreading and speculative execution. Second, we quantify the performance impact of not supporting the load-hit speculation. Finally, we consider the impact of pipelining instruction scheduling logic over two cycles. The general conclusion of our studies is that while speculative execution is still important to achieve high SMT performance, scheduler-related mechanisms can be relaxed because the pipeline bubbles created in the execution schedule of one thread are often filled by the instructions from other threads.
Keywords :
microcomputers; multi-threading; parallel architectures; pipeline processing; processor scheduling; SMT architecture; aggressive scheduling; instruction scheduling logic; multithreaded architecture; pipelining; superscalar processor; Clocks; Computer architecture; Delay; Dynamic scheduling; Logic; Pipeline processing; Processor scheduling; Surface-mount technology; Throughput; Yarn;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Computer Architecture and High Performance Computing, 2008. SBAC-PAD '08. 20th International Symposium on
Conference_Location :
Campo Grande, MS
ISSN :
1550-6533
Print_ISBN :
978-0-7695-3423-7
Type :
conf
DOI :
10.1109/SBAC-PAD.2008.15
Filename :
4685723
Link To Document :
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