Title :
A high-throughput, metastability-free GALS channel based on pausible clock method
Author :
Rahimian, Mohammad Ali ; Mohammadi, Siamak ; Fattah, Mohammad
Author_Institution :
Sch. of ECE, Dependable Syst. Design Lab., Univ. of Tehran, Tehran, Iran
Abstract :
Synchronization issues such as metastability in multi-clock domain systems have become a big problem, reducing data transmission throughput between domains. In this paper, a high-throughput, metastability-free data transmission channel based on pausible clock method in Globally-Asynchronous Locally-Synchronous (GALS) systems is proposed. This channel can be used as the interconnection of mixed-clock synchronous IP cores without having concerns about their synchronization. We show that the probability of metastability in our design is practically zero; and this without loss of throughput and latency, allowing the transmitter and receiver to operate with their own maximum clock frequency. The proposed channel is simulated in 90nm CMOS process using Predictive Technology Model (PTM) library. Gate delays and power parameters are extracted from Spice simulations and are back annotated into our channel HDL code. The throughput, latency and power are analyzed and compared with existing designs.
Keywords :
CMOS integrated circuits; SPICE; clocks; CMOS; SPICE simulation; data transmission throughput; gate delays; metastability probability; metastability-free globally-asynchronous locally-synchronous system channel; mixed-clock synchronous IP cores interconnection; multiclock domain system; pausible clock method; power parameters; predictive technology model library; size 90 nm; CMOS process; Clocks; Data communication; Delay; Frequency synchronization; Metastasis; Predictive models; Propagation losses; Throughput; Transmitters; GALS; metastability free; pausible clock; transceiver;
Conference_Titel :
Quality Electronic Design (ASQED), 2010 2nd Asia Symposium on
Conference_Location :
Penang
Print_ISBN :
978-1-4244-7809-5
DOI :
10.1109/ASQED.2010.5548259