DocumentCode :
3531436
Title :
GPU Implementation of a Programmable Turbo Decoder for Software Defined Radio Applications
Author :
Yoge, Dhiraj Reddy Nallapa ; Chandrachoodan, Nitin
Author_Institution :
Dept. of Electr. Eng., IIT Madras, Chennai, India
fYear :
2012
fDate :
7-11 Jan. 2012
Firstpage :
149
Lastpage :
154
Abstract :
This paper presents the implementation of a 3GPP standards compliant configurable turbo decoder on a GPU. The challenge in implementing a turbo decoder on a GPU is in suitably parallelizing the Log-MAP decoding algorithm and doing an architecture aware mapping of it on to the GPU. The approximations in parallelizing the Log-MAP algorithm come at the cost of reduced BER performance. To mitigate this reduction, different guarding mechanisms of varying computational complexity have been presented. The limited shared memory and registers available on GPUs are carefully allocated to obtain a high real-time decoding rate without requiring several independent data streams in parallel.
Keywords :
3G mobile communication; approximation theory; coprocessors; error statistics; graphics processing units; maximum likelihood decoding; software radio; turbo codes; 3GPP standards compliant configurable turbo decoder; GPU implementation; Log-MAP decoding algorithm; approximations; programmable turbo decoder; reduced BER performance; software defined radio applications; Bit error rate; Decoding; Graphics processing unit; Instruction sets; Measurement; Parallel processing; Throughput; CUDA; GPU implementation; Guarding Mechanisms; Parallel Log-MAP; Turbo Decoder;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Design (VLSID), 2012 25th International Conference on
Conference_Location :
Hyderabad
ISSN :
1063-9667
Print_ISBN :
978-1-4673-0438-2
Type :
conf
DOI :
10.1109/VLSID.2012.62
Filename :
6167744
Link To Document :
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