DocumentCode :
35318
Title :
A 10-Gb/s Adaptive Parallel Receiver With Joint XTC and DFE Using Power Detection
Author :
Shih-Yuan Kao ; Shen-Iuan Liu
Author_Institution :
Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei, Taiwan
Volume :
48
Issue :
11
fYear :
2013
fDate :
Nov. 2013
Firstpage :
2815
Lastpage :
2826
Abstract :
A 10-Gb/s adaptive parallel receiver with joint crosstalk canceller (XTC) and decision-feedback equalizer (DFE) is presented. A differentiator-based XTC and a one-tap DFE are adapted to cancel far-end crosstalk (FEXT) and inter-symbol interference (ISI), respectively. When the lengths of the coupled microstrip lines change, an FEXT detector measures and compares the powers of FEXT and XTC to digitally update the XTC coefficient. Then, an ISI detector measures and compares the powers of the received data and recovered data to digitally update the DFE coefficient. This adaptive parallel receiver was fabricated in a 40-nm CMOS technology. The maximum power consumption is 17.55 mW from a 1.3-V supply, and the core area occupies 0.0352 mm2. For a 10-Gb/s PRBS of 27-1 passing through 15-in FR4 printed-circuit-board traces with 8-mil spacing, the measured rms and peak-to-peak jitter of recovered data are 5.56 and 30.2 ps, respectively. The measured bit error rate is less than 10-12. The measured total calibration time is 2.424 μs.
Keywords :
CMOS integrated circuits; crosstalk; decision feedback equalisers; intersymbol interference; jitter; radio receivers; CMOS technology; FR4 printed-circuit-board traces; adaptive parallel receiver; bit error rate; coupled microstrip lines; decision-feedback equalizer; far-end crosstalk; inter-symbol interference; jitter; joint crosstalk canceller; power 17.55 mW; power detection; size 15 inch; size 40 nm; total calibration time; voltage 1.3 V; Calibration; Clocks; Crosstalk; Decision feedback equalizers; Detectors; Joints; Receivers; Coefficient adaptation; crosstalk-induced jitter (CIJ); decision-feedback equalizer (DFE); far-end crosstalk (FEXT); inter-symbol interference (ISI); parallel interface; receiver;
fLanguage :
English
Journal_Title :
Solid-State Circuits, IEEE Journal of
Publisher :
ieee
ISSN :
0018-9200
Type :
jour
DOI :
10.1109/JSSC.2013.2282116
Filename :
6616671
Link To Document :
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