• DocumentCode
    3531816
  • Title

    SCARE: Side-Channel Analysis Based Reverse Engineering for Post-Silicon Validation

  • Author

    Wang, Xinmu ; Narasimhan, Seetharam ; Krishna, Aswin ; Bhunia, Swarup

  • Author_Institution
    Dept. of Electr. Eng. & Comput. Sci., Case Western Reserve Univ., Cleveland, OH, USA
  • fYear
    2012
  • fDate
    7-11 Jan. 2012
  • Firstpage
    304
  • Lastpage
    309
  • Abstract
    Reverse Engineering (RE) has been historically considered as a powerful approach to understand electronic hardware in order to gain competitive intelligence or accomplish piracy. In recent years, it has also been looked at as a way to authenticate hardware intellectual properties in the court of law. In this paper, we propose a beneficial role of RE in post-silicon validation of integrated circuits (IC) with respect to IC functionality, reliability and integrity. Unlike traditional destructive RE approaches, we propose a fast non-destructive side-channel analysis approach that can hierarchically extract structural information from an IC through its transient current signature. Such a top-down side-channel analysis approach is capable of reliably identifying pipeline stages and functional blocks. It is also suitable to distinguish sequential elements from combinational gates. For extraction of random logic structures (e.g. control blocks and finite state machines) we combine side-channel analysis with logic testing based Boolean function extraction. The proposed approach is amenable to automation, scalable, and can be applied as part of post-silicon validation process to verify that each IC implements exclusively the functionality described in the specification and is free from malicious modification or Trojan attacks. Simulation results on a pipelined DLX processor demonstrate the effectiveness of the proposed approach.
  • Keywords
    Boolean functions; integrated circuit reliability; logic circuits; logic testing; nondestructive testing; silicon; DLX processor; IC functionality; IC integrity; IC post-silicon validation; IC reliability; SCARE; Trojan attacks; electronic hardware; hardware intellectual properties; integrated circuit post-silicon validation; logic testing based Boolean function extraction; malicious modification; nondestructive side-channel analysis approach; pipeline stages; random logic structures; side-channel analysis based reverse engineering; top-down side-channel analysis approach; Adders; Integrated circuits; Logic gates; Switches; Transient analysis; Trojan horses; Vectors; Reverse engineering; logic testing; self-referencing; side-channel analysis;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI Design (VLSID), 2012 25th International Conference on
  • Conference_Location
    Hyderabad
  • ISSN
    1063-9667
  • Print_ISBN
    978-1-4673-0438-2
  • Type

    conf

  • DOI
    10.1109/VLSID.2012.88
  • Filename
    6167769