A Reliability Circuit Implementation for VLSI with Combined Huffman and CRC Coding

Author

Dong, Gang ; Yang, Haigang

Author_Institution

Inst. of Electron., Chinese Acad. of Sci., Beijing

fYear

2009

fDate

28-29 April 2009

Firstpage

1

Lastpage

4

Abstract

The Cyclic Redundancy Checking (CRC) is widely used in many fields. The error undetected probability of the CRC relies on the length of a CRC code. For a certain format of the code, the error undetected probability is nearly a constant. But more bits of the information take more chances to burst an error. This paper proposes to reduce the error burst probability with an application of the compression theory, Huffman coding. Consequently, more reliable circuits using the CRC coding can be implemented. And a new reliability circuit for VLSI is designed in this paper.

Keywords

Huffman codes; VLSI; codecs; cyclic redundancy check codes; error statistics; logic circuits; Huffman coding; VLSI; combined Huffman CRC coding; compression theory; cyclic redundancy checking; error burst probability; reliability circuit implementation; Arithmetic; Circuits; Computational efficiency; Constraint optimization; Cyclic redundancy check; Embedded system; Hardware; Huffman coding; Shift registers; Very large scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

Testing and Diagnosis, 2009. ICTD 2009. IEEE Circuits and Systems International Conference on

Conference_Location

Chengdu

Print_ISBN

978-1-4244-2587-7

Type

conf

DOI

10.1109/CAS-ICTD.2009.4960768

Filename

4960768