DocumentCode
3532009
Title
A Library for Passive Online Verification of Analog and Mixed-Signal Circuits
Author
Pal, Debjit ; Dasgupta, Pallab ; Mukhopadhyay, Siddhartha
Author_Institution
Dept. of Comput. Sci. & Eng., Indian Inst. of Technol. Kharagpur, Kharagpur, India
fYear
2012
fDate
7-11 Jan. 2012
Firstpage
364
Lastpage
369
Abstract
The development and use of assertions in the Analog and Mixed-signal (AMS) domain is a subject which has attracted significant attention lately from the verification community. Recent studies have suggested that natural extensions of assertion languages (like PSL and SVA) into the AMS domain are not expressive enough to capture many AMS behaviors, and that a library of auxiliary AMS functions are needed along with the assertion language. The integration of auxiliary functions with the core fabric of a temporal logic is non-trivial and can be challenging for a verification engineer. In this paper we propose a purely library-based verification approach, where libraries for checking elementary properties can be naturally connected with libraries for auxiliary functions to monitor complex AMS behaviors. We study the modeling of behaviors with the proposed library, and outline the main challenges and their solutions towards implementing the verification library over commercial AMS simulators.
Keywords
mixed analogue-digital integrated circuits; program debugging; program verification; AMS simulators; assertion languages; auxiliary function integration; elementary properties; library; mixed signal integrated circuits; online debugging capability; passive online verification; temporal logic; verification engineer; Delay; Hardware design languages; Libraries; Monitoring; Phase locked loops; Regulators; Steady-state;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Design (VLSID), 2012 25th International Conference on
Conference_Location
Hyderabad
ISSN
1063-9667
Print_ISBN
978-1-4673-0438-2
Type
conf
DOI
10.1109/VLSID.2012.98
Filename
6167779
Link To Document