DocumentCode
3532162
Title
A Diagnosability Metric for Test Set Selection Targeting Better Fault Detection
Author
Kundu, Subhadip ; Chattopadhyay, Santanu ; Sengupta, Indranil ; Kapur, Rohit
Author_Institution
Dept. of CSE, Indian Inst. of Technol. Kharagpur, Kharagpur, India
fYear
2012
fDate
7-11 Jan. 2012
Firstpage
436
Lastpage
441
Abstract
Diagnosis is the methodology to identify the reason behind the failure of manufactured chips. This is particularly important from the yield enhancement viewpoint. The primary focus of a diagnosis algorithm is to accurately narrow down the list of suspected candidates. But for any diagnosis algorithm, the effectiveness will depend on the test set in use. If the test set used is not good enough to distinguish between fault pairs, the diagnosis algorithm can never be able to distinguish between a good number of faults. This problem leads us to find a metric which can characterize test sets in terms of their diagnostic power. In literature, several methods have been proposed for assessment of the diagnostic power of a test set. Though the methods are accurate in nature, the bottleneck is the space and time complexity. Thus, given a number of test sets (with same fault coverage) for a circuit, it is very difficult to select one of them for better diagnosis. In this paper, we have proposed a probability based approach to find out a metric to describe diagnostic power of a test set. We call this metric, the diagnosibility of the test set for a given circuit. Our method uses almost 99% less space compared to the proposed methods and is well accurate.
Keywords
computational complexity; fault diagnosis; integrated circuit testing; integrated circuit yield; microprocessor chips; probability; diagnosability metric; diagnostic power; fault coverage; fault detection; fault pairs; manufactured chip failure; probability; space complexity; test set selection targeting; time complexity; yield enhancement viewpoint; Circuit faults; Complexity theory; Dictionaries; Fault diagnosis; Integrated circuit modeling; Measurement; Very large scale integration; clustering of faults; fault diagnosis; fault dictionary;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Design (VLSID), 2012 25th International Conference on
Conference_Location
Hyderabad
ISSN
1063-9667
Print_ISBN
978-1-4673-0438-2
Type
conf
DOI
10.1109/VLSID.2012.110
Filename
6167791
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