A new 1.5V linear transconductor with high output impedance in a large bandwidth

Author

Martinez-Heredia, J. ; Torralba, A. ; Carvajal, R.G. ; Ramirez-Angulo, J.

Author_Institution

Dpto. de Ingenieria Electronica. Escuela Superior de Ingenieros, Univ. de Sevilla, Spain

Volume

1

fYear

2003

fDate

25-28 May 2003

Abstract

A new linear tunable CMOS transconductor is presented here. This circuit uses a new low-voltage supercascode transistor to provide a high output resistance. Using a standard 0.8 μm CMOS technology simulation results are provided that show the operation of the proposed transconductor with 1.5 V supply voltage featuring less than 0.1% THD for a 10 MHz, 0.6 V peak-to-peak differential input signals. The simulated -3 dB bandwidth is larger than 100 MHz.

Keywords

CMOS analogue integrated circuits; MOSFET; circuit simulation; circuit tuning; electric resistance; harmonic distortion; integrated circuit modelling; low-power electronics; 0.6 V; 0.8 micron; 1.5 V; 10 MHz; 100 MHz; THD; bandwidth; linear tunable CMOS transconductor; low-voltage supercascode transistor; output impedance; output resistance; peak-to-peak differential input signals; standard CMOS technology simulation; supply voltage; Bandwidth; CMOS technology; Immune system; Impedance; Transconductance; Transconductors; Tunable circuits and devices; USA Councils; Virtual colonoscopy; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2003. ISCAS '03. Proceedings of the 2003 International Symposium on

Print_ISBN

0-7803-7761-3

Type

conf

DOI

10.1109/ISCAS.2003.1205524

Filename

1205524