An 8-bit, 1mW successive approximation ADC in SOI CMOS

Author

Culurciello, Eugenio ; Andreou, Andreas

Author_Institution

Dept. of Electr. & Comput. Eng., Johns Hopkins Univ., Baltimore, MD, USA

Volume

1

fYear

2003

fDate

25-28 May 2003

Abstract

A low-power 8-bit successive approximation Analog to Digital Converter (ADC) was designed and fabricated in a 0.5μm Silicon on Sapphire CMOS technology. The ADC is capable of 32MHz operation, producing 1.23MS/s, consuming 1.5mW at 3.3V supply. It uses an active area of 450×315μm² and 916×790μm² including output pads. The acceptable input swing is 2.1V at 3.3V supply. The ADC is a mixed mode analog-digital circuitry performing algorithmic conversion of an analog input voltage into an 8-bit binary code. The lack of parasitics in the Silicon on Sapphire fabrication process simplifies the design of analog to digital converters. The circuit design is freed from the unaccounted bulk capacitances which generate feedback and corrupt the performance of the ADC at high frequency.

Keywords

CMOS integrated circuits; analogue-digital conversion; low-power electronics; mixed analogue-digital integrated circuits; silicon-on-insulator; 0.5 micron; 1 mW; 3.3 V; 32 MHz; 8 bit; SOI CMOS technology; Si-Al₂O₃; low-power successive approximation analog-to-digital converter; mixed-mode analog-digital circuit; silicon-on-sapphire fabrication process; Analog-digital conversion; Binary codes; CMOS technology; Circuit synthesis; Fabrication; Frequency; Parasitic capacitance; Process design; Silicon; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2003. ISCAS '03. Proceedings of the 2003 International Symposium on

Print_ISBN

0-7803-7761-3

Type

conf

DOI

10.1109/ISCAS.2003.1205560

Filename

1205560