• DocumentCode
    3533815
  • Title

    Development and implementation of a Network Processor Architecture in reconfigurable logic (FPGA)

  • Author

    Stefanatos, C. ; Papaefstathiou, I. ; Manifavas, C.

  • Author_Institution
    Electron. & Comput. Eng. Dept., Tech. Univ. of Crete, Chania, Greece
  • fYear
    2010
  • fDate
    8-9 July 2010
  • Firstpage
    103
  • Lastpage
    107
  • Abstract
    Network Processors are used at the core of the Internet, providing routers, switches and other essential network devices with the necessary processing power to deliver proper data forwarding and other network related functions (VoIP, security, etc.) at the required level of performance. In this paper, we present a Network Processor architecture, designed to support all the fundamental instructions needed to deliver proper frame processing. It is designed and implemented on a specific FPGA board, employing Xilinx´s Virtex-5, in order to allow for rapid deployment and usage. Apart from the architecture´s description, performance measurements are provided that demonstrate the architecture´s capabilities.
  • Keywords
    field programmable gate arrays; integrated circuits; reconfigurable architectures; FPGA; Internet core; VoIP; architecture description; network processor architecture; reconfigurable logic; Application software; Computer architecture; Computer networks; Field programmable gate arrays; Hardware; Modems; Process design; Quality of service; Reconfigurable logic; Switches; FPGA; Network Processor; VoIP;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Intelligent Solutions in Embedded Systems (WISES), 2010 8th Workshop on
  • Conference_Location
    Heraklion
  • Print_ISBN
    978-1-4244-5715-1
  • Type

    conf

  • DOI
    10.1109/WISES.2010.5548436
  • Filename
    5548436