DocumentCode :
3534862
Title :
SVM speaker verification system based on a low-cost FPGA
Author :
Ramos-Lara, Rafael ; López-García, Mariano ; Cantó-Navarro, Enrique ; Puente-Rodriguez, Luís
Author_Institution :
Tech. Univ. of Catalonia, Vilanova i Geltru, Spain
fYear :
2009
fDate :
Aug. 31 2009-Sept. 2 2009
Firstpage :
582
Lastpage :
586
Abstract :
Biometric systems, characterized by their high confidential levels of security, are usually based on high-performance microprocessors implemented on personal computers. These advanced devices contain floating-point units able to carry out millions of operations per second at frequencies in the GHz range, being qualified to resolve the most complex algorithms in just a few hundred of milliseconds. However, their main drawback is the cost, and the necessary space required to incorporate their external associated peripherals. This disadvantage is especially significant in the low-cost consumer market, where factors such as price and size determine the viability of a product. The use of an FPGA is a suited way to implement systems that require a high computational capability at affordable prices. Besides, these devices allow the design of complex digital systems with outstanding performances in terms of execution times. This paper presents the implementation of a SVM (Support Vector Machines) speaker verification system on a low-cost FPGA. Experimental results show as our system is able to verify a person´s identity as fast as a high-performance microprocessor based on a Pentium IV personal computer.
Keywords :
field programmable gate arrays; speaker recognition; support vector machines; FPGA; SVM speaker verification system; biometric system; floating-point unit; high-performance microprocessor; personal computer; support vector machine; Biometrics; Computer security; Costs; Field programmable gate arrays; Frequency; Hardware; Microcomputers; Microprocessors; Support vector machine classification; Support vector machines;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Field Programmable Logic and Applications, 2009. FPL 2009. International Conference on
Conference_Location :
Prague
ISSN :
1946-1488
Print_ISBN :
978-1-4244-3892-1
Electronic_ISBN :
1946-1488
Type :
conf
DOI :
10.1109/FPL.2009.5272430
Filename :
5272430
Link To Document :
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