DocumentCode :
3535359
Title :
FPGA partial reconfiguration via configuration scrubbing
Author :
Heiner, Jonathan ; Sellers, Benjamin ; Wirthlin, Michael ; Kalb, Jeff
Author_Institution :
Dept. of Electr. & Comput. Eng., Brigham Young Univ., Provo, UT, USA
fYear :
2009
fDate :
Aug. 31 2009-Sept. 2 2009
Firstpage :
99
Lastpage :
104
Abstract :
SRAM-based FPGA devices are susceptible to single event effects (SEE) including single event upsets (SEU) within the configuration memory. Configuration scrubbing along with TMR or other hardware redundancy techniques are often used to mitigate the effects of these SEUs. However, the use of traditional configuration scrubbing prevents the ability to reconfigure the FPGA dynamically or to perform partial reconfiguration. This paper presents a novel technique that allows partial reconfiguration to be used with configuration scrubbing. A self scrubber, utilizing a small portion of the FPGA, performs the necessary operations to reconfigure a portion of the design while continuously scrubbing the entire FPGA.
Keywords :
SRAM chips; field programmable gate arrays; FPGA partial reconfiguration; SRAM; configuration memory; configuration scrubbing; hardware redundancy techniques; selfscrubber; single event effects; single event upsets; triple modular redundancy; Application software; Circuits; Error correction; Error correction codes; Field programmable gate arrays; Hardware; Laboratories; Single event upset; Wireless sensor networks; Writing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Field Programmable Logic and Applications, 2009. FPL 2009. International Conference on
Conference_Location :
Prague
ISSN :
1946-1488
Print_ISBN :
978-1-4244-3892-1
Electronic_ISBN :
1946-1488
Type :
conf
DOI :
10.1109/FPL.2009.5272543
Filename :
5272543
Link To Document :
بازگشت