Title :
Towards a viable out-of-order soft core: Copy-Free, checkpointed register renaming
Author :
Aasaraai, Kaveh ; Moshovos, Andreas
Author_Institution :
Dept. of Electr. & Comput. Eng., Univ. of Toronto, Toronto, ON, Canada
fDate :
Aug. 31 2009-Sept. 2 2009
Abstract :
As a step torward a viable, single-issue out-of-order soft core, this work presents copy-free checkpointing (CFC), an FPGA-friendly register renaming design. CFC supports speculative execution by implementing checkpoint recovery. Compared against the best conventional register renaming implementation CFC requires 7.5x to 6.4x fewer LUTs and is at least 10% faster.
Keywords :
checkpointing; embedded systems; field programmable gate arrays; instruction sets; logic design; microprocessor chips; FPGA-friendly register renaming design; checkpointed register renaming design; copy-free checkpointing; embedded systems; field programmable gate arrays; viable out-of-order soft core; Checkpointing; Costs; Embedded system; Field programmable gate arrays; Frequency; Out of order; Pipeline processing; Registers; Table lookup; VLIW;
Conference_Titel :
Field Programmable Logic and Applications, 2009. FPL 2009. International Conference on
Conference_Location :
Prague
Print_ISBN :
978-1-4244-3892-1
Electronic_ISBN :
1946-1488
DOI :
10.1109/FPL.2009.5272544
