Title :
An innovative design of the DDR/DDR2 SDRAM compatible controller
Author :
Makam, Darshan ; Jayashree, H.V.
Author_Institution :
E&CE Dept., PESIT, Bangalore, India
Abstract :
PC technologies continue to evolve as performance demands grow; the frequency and performance of memory are required to be higher and higher. Throughout the history of the PC, memory technology has steadily progressed in capacity and performance to meet the increasing requirements of other PC hardware subsystems and software. Just using DDR SDRAM (DDR), we can´t meet the demands. Compared with DDR, DDR2 SDRAM (DDR2) has higher speed, lower power, higher efficiency, and higher stability. For this reason, based on a common standard bus interface, an innovative design of the DDR/DDR2 SDRAM compatible controller is implemented and verified. If this compatible controller can be included in the computer architecture, the system will be more flexible and transplantable.
Keywords :
DRAM chips; field buses; memory architecture; microcontrollers; DDR SDRAM compatible controller; DDR2 SDRAM compatible controller design; PC hardware subsystems; PC software; PC technology; computer architecture; double data rate SDRAM; memory frequency; memory performance; standard bus interface; Additives; Clocks; Computers; SDRAM; Timing; Compatible controller; DDR; DDR2 SDRAM;
Conference_Titel :
Nanoscience, Engineering and Technology (ICONSET), 2011 International Conference on
Conference_Location :
Chennai
Print_ISBN :
978-1-4673-0071-1
DOI :
10.1109/ICONSET.2011.6168042
