Title :
Customizable domain-specific computing
Author_Institution :
Comput. Sci. Dept., UCLA, Los Angeles, CA, USA
fDate :
Aug. 31 2009-Sept. 2 2009
Abstract :
In order to meet ever-increasing computing needs and overcome power density limitations, the computing industry has halted simple processor frequency scaling and entered the era of parallelization, with tens to hundreds of computing cores integrated in a single processor, and hundreds to thousands of computing servers connected in a warehouse-scale data center. However, such highly parallel, general-purpose computing systems still face serious challenges in terms of performance, power, heat dissipation, space, and cost. In this talk, I suggest that we look beyond parallelization and focus on domain-specific customization as the next opportunity to bring orders-of-magnitude power-performance efficiency improvement to important classes of applications. This challenge requires a great deal of innovation in architecture, compilation, and runtime system design, and offers many exciting and challenging research opportunities. I shall highlight some promising developments in direction so far and discuss various opportunities for the FPL research community.
Keywords :
computer architecture; microprocessor chips; program compilers; architecture; compilation; computing core; customizable domain-specific computing; processor frequency scaling; runtime system design; Computer architecture; Computer industry; Computer science; Concurrent computing; Costs; Design automation; Frequency; High performance computing; Space heating; Very large scale integration;
Conference_Titel :
Field Programmable Logic and Applications, 2009. FPL 2009. International Conference on
Conference_Location :
Prague
Print_ISBN :
978-1-4244-3892-1
Electronic_ISBN :
1946-1488
DOI :
10.1109/FPL.2009.5272570