DocumentCode
3535668
Title
New interpretation of threshold voltage in polysilicon TFTs: a theoretical and experimental study
Author
Jacunski, M.D. ; Shur, M.S. ; Hack, M.
Author_Institution
Dept. of Electr. Eng., Virginia Univ., Charlottesville, VA, USA
fYear
1995
fDate
19-21 June 1995
Firstpage
158
Lastpage
159
Abstract
Discusses the extraction of threshold voltage for n and p channel polysilicon thin film transistors. First, the effect of measurement frequency is investigated, both experimentally and via 2D numerical device simulation. The temporal characteristics ofthe boundary traps are shown to cause a significant positive (negative) shift of the gate to channel capacitance curve for n-channel (p-channel) TFTs as a function of frequency.
Keywords
capacitance; electron traps; elemental semiconductors; semiconductor device models; silicon; thin film transistors; 2D numerical device simulation; Si; boundary traps; gate to channel capacitance curve; measurement frequency; polysilicon TFTs; temporal characteristics; threshold voltage; Capacitance; Computer hacking; Data mining; Frequency measurement; Grain boundaries; MOSFETs; Numerical simulation; Photonic band gap; Thin film transistors; Threshold voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Device Research Conference, 1995. Digest. 1995 53rd Annual
Conference_Location
Charlottesville, VA, USA
Print_ISBN
0-7803-2788-8
Type
conf
DOI
10.1109/DRC.1995.496310
Filename
496310
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