Title :
ESD protection solutions for high voltage technologies
Author :
Keppens, Bart ; Mergens, Markus P J ; Trinh, Cong Son ; Russ, Christian C. ; Van Camp, B. ; Verhaege, Koen G.
Author_Institution :
Sarnoff Eur., Gistel, Belgium
Abstract :
There is a trend to revive mature technologies while including high voltage options. ESD protection in those technologies is challenging due to narrow ESD design windows, NMOS degradation issues and the creation of unexpectedly weak parasitic devices. Different case studies are presented for ESD protection based on latch-up immune SCR devices.
Keywords :
CMOS integrated circuits; MOSFET; electrostatic discharge; elemental semiconductors; integrated circuit reliability; power integrated circuits; power transistors; silicon; thyristors; CMOS technology; ESD protection solutions; NMOS degradation; Si; ggNMOS transistors; high voltage technology; latch-up immune SCR devices; silicon controlled rectifiers; weak parasitic devices; CMOS technology; Electrostatic discharge; Implants; MOS devices; MOSFETs; Neodymium; Neural networks; Protection; Thyristors; Voltage;
Conference_Titel :
Electrical Overstress/Electrostatic Discharge Symposium, 2004. EOS/ESD '04.
Conference_Location :
Grapevine, TX
Print_ISBN :
978-1-5853-7063-4
Electronic_ISBN :
978-1-5853-7063-4
DOI :
10.1109/EOSESD.2004.5272593
