DocumentCode :
3535758
Title :
Advanced ESD rail clamp network design for high voltage CMOS applications
Author :
Stockinger, Michael ; Miller, James W.
Author_Institution :
Freescale Semicond., Austin, TX, USA
fYear :
2004
fDate :
19-23 Sept. 2004
Firstpage :
1
Lastpage :
9
Abstract :
We present a new boosted and distributed ESD rail clamp protection approach for high voltage CMOS applications using stacked active MOSFET rail clamps and provide design guidelines for practical pad ring scenarios. This approach offers improved ESD robustness, area compactness, layout modularity, process portability, scalability, and ease of simulation.
Keywords :
CMOS integrated circuits; MOSFET; electrostatic discharge; integrated circuit design; integrated circuit layout; power integrated circuits; power semiconductor devices; ESD rail clamp network design; area compactness; distributed ESD rail clamp protection; high voltage CMOS applications; layout modularity; pad ring scenarios; process portability; scalability; stacked active MOSFET rail clamps; Anodes; Clamps; Design methodology; Electrostatic discharge; MOSFET circuits; Protection; Rails; Robustness; Variable structure systems; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electrical Overstress/Electrostatic Discharge Symposium, 2004. EOS/ESD '04.
Conference_Location :
Grapevine, TX
Print_ISBN :
978-1-5853-7063-4
Electronic_ISBN :
978-1-5853-7063-4
Type :
conf
DOI :
10.1109/EOSESD.2004.5272599
Filename :
5272599
Link To Document :
بازگشت