Evidence of reduced maximum lateral e-field in quasi-SOI MOSFETs

A novel MOSFET device structure known as Quasi-SOI (QSOI MOSFET) permits direct measurements of substrate current generated by impact ionization near the SOI drain. It is observed that QSOI devices with identical dimensions and fabricated on the same wafer as built devices have lower substrate current when subjected to the same biases. We present here simulated and experimental evidence leading to the conclusion that the lateral maximum electric field near the drain is indeed lower in QSOI devices, with important implications for enhanced reliability in true SOI MOSETs