Latchup test-induced failure within ESD protection diodes in a high-voltage CMOS IC product

Author

Lin, I. Cheng ; Chao, Chuan-Jane ; Ker, Ming-Dou ; Tseng, Jen-Chou ; Hsu, Chung-Ti ; Leu, Len-Yi ; Chen, Yu-Lin ; Tsai, Chia-Ku ; Huang, Ren-Wen

Author_Institution

Emerging Technol. Center, Winbond Electron. Corp., Hsinchu, Taiwan

fYear

2004

fDate

19-23 Sept. 2004

Firstpage

1

Lastpage

6

Abstract

An EOS-like latchup failure occurred in a high-voltage IC product during latchup test and was identified within ESD diodes themselves. A parasitic npn bipolar formed by ESD protection diodes was trigger-activated and produced large current to result in EOS failure. This was verified by electrical measurement from TLP and curve-tracer as well as physical failure analysis. Corresponding layout solutions were proposed and solved this anomalous latchup failure successfully. Therefore ESD protection diode should be laid carefully for true latchup-robust design.

Keywords

CMOS integrated circuits; diodes; electrostatic discharge; power integrated circuits; EOS-like latchup failure; ESD protection diodes; curve tracer; electrical measurement; high-voltage CMOS integrated circuit; latchup test induced failure; parasitic npn bipolar; physical failure analysis; CMOS integrated circuits; CMOS technology; Diodes; Electronic equipment testing; Electrostatic discharge; Failure analysis; Industrial electronics; Integrated circuit testing; Protection; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Electrical Overstress/Electrostatic Discharge Symposium, 2004. EOS/ESD '04.

Conference_Location

Grapevine, TX

Print_ISBN

978-1-5853-7063-4

Electronic_ISBN

978-1-5853-7063-4

Type

conf

DOI

10.1109/EOSESD.2004.5272617

Filename

5272617