Single spin-FET for programmable logic gates

A magnetic device that enables the realization of various logic functions in a single transistor is proposed. The device consists of a current-conducting 2DEG layer, and a set of four ferromagnetic (FM) gates and two non-magnetic (NM) gates deposited on top of a HEMT heterostructure. FM gates are magnetized perpendicular-to-plane so that magnetic fields (B) extend vertically through the 2DEG plane. Electrical voltages are applied to the NM gates so that a periodic series of magneto-electric barriers is established across the 2DEG conduction path. This device selects the functions of AND, OR, NAND, NOR, XOR, NOT, YES, according to the magnetizations of FM1, FM3, and the electrical potentials (U) of NM1, NM2. FM2 and FM4 function as the two inputs to the logic gate depending on the selection. Electron motion is described by the minimal coupling Hamiltonian with the Zeeman perturbation term at the delta B field region.