Title :
Electrochemical planarization by selective electroplating for embedded gold wiring in the sub-micron range
Author :
Chan, M.Y. ; Lo, T.C.
Author_Institution :
Dept. of Electr. & Electron. Eng., Hong Kong Univ. of Sci. & Technol., Hong Kong
Abstract :
A planar Au metallization process by electrolytic plating has been developed for metal interconnections in the submicron range. Gold wires with high aspect ratio were fabricated in an embedded structure within the dielectric spacer. By etching of Au and oxidizing the surface of TiW in the field, the gold wires can be selectively formed within the dielectric. This process can provide desired properties of conductor structures for Si LSI applications
Keywords :
electrochemistry; electroplating; gold; integrated circuit metallisation; Au; Si LSI; aspect ratio; conductor; dielectric spacer; electrochemical planarization; embedded gold wiring; etching; fabrication; planar metallization; selective electroplating; sub-micron metal interconnections; surface oxidation; Dielectrics; Fabrication; Gold; Integrated circuit interconnections; Metallization; Planarization; Resists; Sputter etching; Wires; Wiring;
Conference_Titel :
Microelectronics and VLSI, 1995. TENCON '95., IEEE Region 10 International Conference on
Print_ISBN :
0-7803-2624-5
DOI :
10.1109/TENCON.1995.496396
