DocumentCode :
3536698
Title :
An asynchronous matrix multiplier
Author :
Pang, Y.W. ; Choy, C.S.
Author_Institution :
Dept. of Electron. Eng., Chinese Univ. of Hong Kong, Shatin, Hong Kong
fYear :
1995
fDate :
6-10 Nov 1995
Firstpage :
315
Lastpage :
318
Abstract :
The paper describes an asynchronous matrix multiplier. A simple and efficient micropipeline structure is applied. With a voltage-controlled delay and basic handshaking control protocol, the multiplier is guaranteed to be hazard free. Also, its performance can be adjusted after fabrication
Keywords :
CMOS logic circuits; asynchronous circuits; delays; digital arithmetic; hazards and race conditions; logic design; multiplying circuits; synchronisation; 1.2 micron; CMOS IC; asynchronous matrix multiplier; handshaking control protocol; hazard free design; micropipeline structure; voltage-controlled delay; Artificial intelligence; Clocks; Counting circuits; Delay; Fabrication; Hazards; Latches; Protocols; Very large scale integration; Voltage control;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Microelectronics and VLSI, 1995. TENCON '95., IEEE Region 10 International Conference on
Print_ISBN :
0-7803-2624-5
Type :
conf
DOI :
10.1109/TENCON.1995.496403
Filename :
496403
Link To Document :
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