Device selection for system partitioning

Author

Weinmann, Ulrich ; Bringmann, Oliver ; Rosenstiel, Wolfgang

Author_Institution

Comput. Sci. Res. Center, Karlsruhe Univ., Germany

fYear

1995

fDate

18-22 Sep 1995

Firstpage

2

Lastpage

7

Abstract

This paper presents a new approach to the problem of selecting suited target technologies and devices for complex circuits. The implemented algorithm is based on formulating partitioning and device selection as a general facility location problem. The complexity of this NP-hard problem is reduced by transferring the constraints of the function in a dual lower bound function using Lagrangian relaxation and subgradient optimization. The evaluated sample circuits, generated by high-level synthesis tools, show cost minimized implementations using low computing times

Keywords

circuit analysis computing; computational complexity; high level synthesis; operations research; Lagrangian relaxation; NP-hard problem; complexity; device selection; dual lower bound function; facility location problem; high-level synthesis tools; subgradient optimization; system partitioning; Computer science; Cost function; High level synthesis; Integrated circuit interconnections; Logic circuits; Logic devices; Minimization; NP-hard problem; Partitioning algorithms; Timing;

fLanguage

English

Publisher

ieee

Conference_Titel

Design Automation Conference, 1995, with EURO-VHDL, Proceedings EURO-DAC '95., European

Conference_Location

Brighton

Print_ISBN

0-8186-7156-4

Type

conf

DOI

10.1109/EURDAC.1995.527381

Filename

527381