DocumentCode :
3539897
Title :
π-TM: Pessimistic invalidation for scalable lazy hardware transactional memory
Author :
Negi, Anurag ; Titos-Gil, Rubén ; Acacio, Manuel E. ; Garcia, José M. ; Stenstrom, Per
Author_Institution :
Chalmers Univ. of Technol., Gothenburg, Sweden
fYear :
2012
fDate :
25-29 Feb. 2012
Firstpage :
1
Lastpage :
12
Abstract :
Lazy hardware transactional memory has been shown to be more efficient at extracting available concurrency than its eager counterpart. However, it poses scalability challenges at commit time as existence of conflicts among concurrent transactions is not known prior to commit. Non-conflicting transactions may have to wait before committing, severely affecting performance in certain workloads. Early conflict detection can be employed to allow such transactions to commit simultaneously. In this paper we show that the potential of this technique has not yet been fully utilized, with design choices in prior work severely burdening common-case transactional execution to avoid some relatively uncommon correctness concerns. The paper quantifies the severity of the problem and develops μ-TM, an early conflict detection - lazy conflict resolution design. This design highlights how, with modest extensions to existing directory-based coherence protocols, information regarding possible conflicts can be effectively used to achieve true parallelism at commit without burdening the common-case. We leverage the observation that contention is typically seen on only a small fraction of shared data accessed by coarse-grained transactions. Pessimistic invalidation of such lines when committing or aborting, therefore, enables fast common-case execution. Our results show that μ-TM performs consistently well and, in particular, far better than previous work on early conflict detection in lazy HTM. We also identify a pathological scenario that lazy designs with early conflict detection suffer from and propose a simple hardware workaround to sidestep it.
Keywords :
concurrency control; protocols; transaction processing; π-TM; coarse-grained transactions; common-case transactional execution; concurrent transactions; directory-based coherence protocols; early conflict detection; lazy conflict resolution design; nonconflicting transactions; pessimistic invalidation; scalable lazy hardware transactional memory; shared data access; Coherence; Hardware; Parallel processing; Protocols; Safety; Scalability; Software;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
High Performance Computer Architecture (HPCA), 2012 IEEE 18th International Symposium on
Conference_Location :
New Orleans, LA
ISSN :
1530-0897
Print_ISBN :
978-1-4673-0827-4
Electronic_ISBN :
1530-0897
Type :
conf
DOI :
10.1109/HPCA.2012.6168951
Filename :
6168951
Link To Document :
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