DocumentCode
3540114
Title
WEST: Cloning data cache behavior using Stochastic Traces
Author
Balakrishnan, Ganesh ; Solihin, Yan
Author_Institution
Dept. of Electr. & Comput. Eng., North Carolina State Univ., Raleigh, NC, USA
fYear
2012
fDate
25-29 Feb. 2012
Firstpage
1
Lastpage
12
Abstract
Cache designers need an in-depth understanding of end user workloads, but certain end users are apprehensive about sharing code or traces due to the proprietary or confidential nature of code and data. To bridge this gap, cache designers use a reduced representation of the code (a clone). A promising cloning approach is the black box approach, where workloads are profiled to obtain key statistics, and a clone is automatically generated. Despite its potential, currently there are no highly accurate black box cloning methods for replicating data cache behavior. We propose Workload Emulation using Stochastic Traces (WEST), a highly accurate black box cloning technique for replicating data cache behavior of arbitrary programs. First, we analyze what profiling statistics are necessary and sufficient to capture a workload. Then, we generate a clone stochastically that produces statistics identical to the proprietary workload. WEST clones can be used in lieu of the workload for exploring cache sizes, associativities, write policies, replacement policies, cache hierarchies and co-scheduling, at a significantly reduced simulation time. We use a simple IPC model to control the rate of accesses to the cache hierarchy. We evaluated WEST using CPU2006 and BioBench suites over a wide cache design space for single core and dual core CMPs. The clones achieve an average error in miss ratio of only 0.4% across 1394 single core cache configurations. For co-scheduled mixes, WEST achieves an average error in miss ratio of only 3.1% for over 600 configurations.
Keywords
cache storage; multiprocessing systems; statistical analysis; BioBench; CPU2006; IPC model; WEST; associativities; black box approach; black box cloning methods; cache hierarchies; cache sizes; code representation reduction; coscheduling; data cache behavior cloning; dual core CMP; end user workloads; key statistics; profiling statistics analysis; replacement policies; single core CMP; workload emulation using stochastic traces; write policies; Benchmark testing; Cloning; Data models; Emulation; Load modeling; Stochastic processes; Strontium;
fLanguage
English
Publisher
ieee
Conference_Titel
High Performance Computer Architecture (HPCA), 2012 IEEE 18th International Symposium on
Conference_Location
New Orleans, LA
ISSN
1530-0897
Print_ISBN
978-1-4673-0827-4
Electronic_ISBN
1530-0897
Type
conf
DOI
10.1109/HPCA.2012.6169042
Filename
6169042
Link To Document