A new offset cancellation technique for folding ADC

Author

Movahedian, Hamid ; Bakhtiar, Mehrdad Sharif

Author_Institution

Dept. of Electr. Eng., Sharif Univ. of Technol., Tehran, Iran

fYear

2005

fDate

23-26 May 2005

Firstpage

200

Abstract

In this paper, a new method for automatic cancellation of mismatch-induced errors in folding ADC is introduced. Using "trimmable MOSFET" for input transistors, this method results in considerable reduction of the size of speed-determining transistors while keeping integral nonlinearity (INL) arbitrarily low. Using this technique, an 8-bit folding ADC is re-designed and its performance is compared to the original work.

Keywords

MOS integrated circuits; MOSFET; analogue-digital conversion; automatic cancellation; folding ADC; input transistors; integral nonlinearity; mismatch-induced errors; offset cancellation; speed-determining transistors; trimmable MOSFET; Analog-digital conversion; Calibration; Circuits; Current measurement; Differential amplifiers; Frequency; MOSFETs; Preamplifiers; Signal sampling; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2005. ISCAS 2005. IEEE International Symposium on

Print_ISBN

0-7803-8834-8

Type

conf

DOI

10.1109/ISCAS.2005.1464559

Filename

1464559

Link To Document

https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3541019