Boosting the on-current of silicon nanowire tunnel-FETs

Tunnel-FETs are potential successors of MOSFETs because of the absence of short-channel effects and of a subthreshold-slope limit. As a solution to the low on-currents reported for silicon-based tunnel devices, we have simulated both gate configuration modifications as well as source material modifications. These modifications are ideally suited for implementations in vertical nanowire-based transistor architectures. We demonstrate that the on-current of a silicon tunnel-FET with a germanium heterojunction at the source reaches the same level as state-of-the-art MOSFET´s.