High-speed CMOS-to-ECL pad driver in 0.18 μm CMOS

Author

Centurelli, F. ; Lulli, G. ; Marietti, P. ; Monsurro, P. ; Scotti, G. ; Trifiletti, A.

Author_Institution

Dip. di Ingegneria Elettronica, Univ. di Roma, Italy

fYear

2005

fDate

23-26 May 2005

Firstpage

448

Abstract

In this paper, we present a CMOS-to-ECL converter and pad driver, to provide true negative ECL outputs from a positive-supply CMOS ASIC. The circuit exploits negative feedback loops to precisely set the output voltages corresponding to 0 and 1 logic ECL levels, and a high speed current switch to allow a bit rate of hundreds of Mb/s. Simulations using 0.18 μm CMOS technology show a bit-rate in excess of 1 Gb/s, with high tolerance to temperature, load resistance and capacitance values.

Keywords

CMOS logic circuits; buffer circuits; circuit feedback; driver circuits; emitter-coupled logic; 0.18 micron; 1 Gbit/s; CMOS-to-ECL converter; CMOS-to-ECL pad driver; ECL logic levels; bit-rate; high speed current switch; load capacitance tolerance; load resistance tolerance; negative feedback loops; output buffer; positive-supply CMOS ASIC; temperature tolerance; true negative ECL outputs; Application specific integrated circuits; CMOS logic circuits; CMOS technology; Driver circuits; Feedback circuits; Logic circuits; Negative feedback loops; Switches; Switching circuits; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2005. ISCAS 2005. IEEE International Symposium on

Print_ISBN

0-7803-8834-8

Type

conf

DOI

10.1109/ISCAS.2005.1464621

Filename

1464621