• DocumentCode
    3541475
  • Title

    Full adder operation based on Si nanodot array device

  • Author

    Kaizawa, Takuya ; Arita, Masashi ; Fujiwara, Akira ; Yamazaki, Kenji ; Ono, Yukinori ; Inokawa, Hiroshi ; Takahashi, Yasuo

  • Author_Institution
    Dept. of Inf. Sci. & Technol., Hokkaido Univ., Sapporo, Japan
  • fYear
    2008
  • fDate
    15-16 June 2008
  • Firstpage
    1
  • Lastpage
    2
  • Abstract
    We demonstrate a highly functional Si-nanodot-array device that has three input gates and two output terminals. The device was fabricated on an SOI wafer using Si MOS processes. We confirmed that a single device can operate as both a half adder and a full adder when we carefully select the operation voltages.
  • Keywords
    adders; nanoelectronics; silicon-on-insulator; MOS processes; SOI wafer; full adder operation; half adder; nanodot array device; three input gates; two output terminals; Current measurement; Electrons; Germanium silicon alloys; Heart; Isotopes; Modems; Nanoscale devices; Physics; Quantum dots; Silicon germanium;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Silicon Nanoelectronics Workshop, 2008. SNW 2008. IEEE
  • Conference_Location
    Honolulu, HI
  • Print_ISBN
    978-1-4244-2071-1
  • Type

    conf

  • DOI
    10.1109/SNW.2008.5418457
  • Filename
    5418457
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3541475