DocumentCode
3541720
Title
Power-aware global signaling strategies
Author
Sylvester, Dennis ; Kaul, Himanshu ; Agarwal, Kanak ; Rao, Rahul M. ; Nassif, Sani ; Brown, Richard B.
Author_Institution
Michigan Univ., Ann Arbor, MI, USA
fYear
2005
fDate
23-26 May 2005
Firstpage
604
Abstract
The paper targets the rising power demands (both static and dynamic) of aggressive repeater usage for global interconnect. We describe three techniques to reduce both dynamic and static power consumption, including active mode leakage reduction. These techniques leverage new repeater designs, multiple voltage domains, and transition-awareness to improve upon the traditional repeater paradigm with little increase in design effort.
Keywords
CMOS integrated circuits; integrated circuit design; integrated circuit interconnections; power consumption; repeaters; CMOS inverters; active mode leakage reduction; aggressive repeater usage; design solutions; global interconnects; multiple voltage domains; power consumption; power demands; power-aware global signaling strategies; total chip power; transition-awareness; Capacitance; Cities and towns; Delay; Energy consumption; Integrated circuit interconnections; Power demand; Repeaters; Timing; Wires; Wiring;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2005. ISCAS 2005. IEEE International Symposium on
Print_ISBN
0-7803-8834-8
Type
conf
DOI
10.1109/ISCAS.2005.1464660
Filename
1464660
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