Design and verification of a low-cost reconfigurable 16-QAM system

Author

Yufeng Lu ; In Soo Ahn ; Gaught, Anthony

Author_Institution

Dept. of Electr. & Comput. Eng., Bradley Univ., Peoria, IL, USA

fYear

2013

fDate

9-11 May 2013

Firstpage

1

Lastpage

4

Abstract

Field Programmable Gate Array (FPGA) has been widely used in automotive, broadcast, high performance computing, video and image processing. In this paper, a reconfigurable 16-QAM system is designed using hardware description language (HDL). An efficient design with less logic resource usage and better design compatibility has been implemented on an FPGA. Additionally, a cross-tool design flow is discussed for project verification. This type of study could have a broader impact in communication research and education.

Keywords

field programmable gate arrays; formal verification; hardware description languages; logic design; quadrature amplitude modulation; reconfigurable architectures; FPGA; HDL; communication education; communication research; cross-tool design flow; design compatibility; field programmable gate array; hardware description language; logic resource usage; low-cost reconfigurable system; project verification; reconfigurable 16-QAM system; Field programmable gate arrays; Generators; Hardware; Hardware design languages; MATLAB; 16-QAM; Compatibility; FPGA; Verification;

fLanguage

English

Publisher

ieee

Conference_Titel

Electro/Information Technology (EIT), 2013 IEEE International Conference on

Conference_Location

Rapid City, SD

ISSN

2154-0357

Print_ISBN

978-1-4673-5207-9

Type

conf

DOI

10.1109/EIT.2013.6632660

Filename

6632660