DocumentCode
3542453
Title
Efficient FPGA implementation for the IEEE 802.16e interleaver
Author
Khater, Abdelmohsen A. ; Khairy, Mohamed M. ; Habib, S.E.-D.
Author_Institution
Elec. & Comm. Dept., Cairo Univ., Giza, Egypt
fYear
2009
fDate
19-22 Dec. 2009
Firstpage
181
Lastpage
184
Abstract
In this paper, we implement and evaluate a novel design for the hardware of the multi-mode interleaver block used in the OFDMA mode of the IEEE 802.16e (Mobile WiMAX) standard. A new architecture that is both area and delay efficient is introduced. The area and delay efficiency of this new architecture is verified via quantitative comparisons between FPGA implementations of this architecture and classical interleaver designs.
Keywords
OFDM modulation; WiMax; field programmable gate arrays; frequency division multiple access; mobile radio; telecommunication standards; IEEE 802.16e; field programmable gate arrays; mobile WiMAX; multi-mode interleaver block; orthogonal frequency division multiple access; Field programmable gate arrays; Microelectronics;
fLanguage
English
Publisher
ieee
Conference_Titel
Microelectronics (ICM), 2009 International Conference on
Conference_Location
Marrakech
Print_ISBN
978-1-4244-5814-1
Type
conf
DOI
10.1109/ICM.2009.5418660
Filename
5418660
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