• DocumentCode
    3542805
  • Title

    Efficient high radix modular multiplication for high-speed computing in re-configurable hardware [cryptographic applications]

  • Author

    Wang, Yi ; Leiwo, Jussipekka ; Srikanthan, Thambipillai

  • Author_Institution
    Sch. of Comput. Eng., Nanyang Technol. Univ., Singapore, Singapore
  • fYear
    2005
  • fDate
    23-26 May 2005
  • Firstpage
    1226
  • Abstract
    RSA is one of the most widely used public key cryptosystems, where modular multiplications constitute the computing intensive kernel of modular exponentiations. An efficient fast modular multiplication algorithm is proposed to notably reduce the overall computation time of the modified Montgomery´s algorithm. Simulation results show consistent improvements for a wide range of bit widths and radix k values with approximately 50% reduction in the computation time when compared to existing method. The proposed algorithm was ported to FPGA for bit widths ranging from 128 to 2048. Our results shows, for a bit width of 2048 with k=1 significant speed-up in the computation can be realized when the proposed technique is ported to FPGA.
  • Keywords
    digital arithmetic; digital signatures; field programmable gate arrays; public key cryptography; 128 to 2048 bit; FPGA; Montgomery multiplication; RSA public key cryptosystems; digital signatures; high radix modular multiplication; high-speed computing; modular exponentiation; re-configurable hardware; Digital signatures; Embedded computing; Embedded system; Field programmable gate arrays; Hardware; High performance computing; Information security; Public key cryptography; Resists; Timing; FPGA; Montgomery multiplication; high radix; modular multiplication;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems, 2005. ISCAS 2005. IEEE International Symposium on
  • Print_ISBN
    0-7803-8834-8
  • Type

    conf

  • DOI
    10.1109/ISCAS.2005.1464815
  • Filename
    1464815