DocumentCode
3542894
Title
SET and RESET pulse characterization in BJT-selected phase-change memories
Author
Bedeschi, F. ; Bonizzoni, E. ; Casagrande, G. ; Gastaldi, R. ; Resta, C. ; Torelli, G. ; Zella, D.
Author_Institution
Memory Product Group, STMicroelectronics, Agrate Brianza, Italy
fYear
2005
fDate
23-26 May 2005
Firstpage
1270
Abstract
This paper presents program pulse characterization in an 8-Mb BJT-selected phase-change memory test chip. Experimental results of the impact of the bit-line resistance over programming pulse efficiency are provided. Furthermore, in order to compensate for spreads in cell physical parameters in an array portion, a non-conventional staircase-down program pulse is proposed and experimentally evaluated.
Keywords
bipolar memory circuits; phase change materials; random-access storage; 8 Mbit; BJT-selected phase-change memories; RESET pulse characterization; SET pulse characterization; bit-line resistance effects; cell physical parameter spread compensation; nonvolatile memories; programming pulse efficiency; staircase-down program pulse; Amorphous materials; Crystalline materials; Crystallization; Electronic equipment testing; Impedance; Material storage; Nonvolatile memory; Phase change materials; Phase change memory; Temperature;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2005. ISCAS 2005. IEEE International Symposium on
Print_ISBN
0-7803-8834-8
Type
conf
DOI
10.1109/ISCAS.2005.1464826
Filename
1464826
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