Latest benchmark results of VHDL simulation systems

One big bottleneck for VHDL-based system simulation was the weak performance of the VHDL simulators. The new approach of the Native-Compiled-Code based simulators is very promising. The main objectives of the following evaluations were performance and compliance to VHDL-1076. The test cases (in total 80000 lines of code) of the benchmarking were written by hardware designers with different style of coding. More than 400 single results delivered precise information on the software simulation systems of 5 different vendors and one hardware accelerator