Further complexity reduction of parallel FIR filters

Based on recently published low complexity parallel FIR filter structures, this paper proposes a new scheme to further reduce their hardware complexity. A FIR filter is firstly transformed into linear convolution, which is then implemented by the iterated short convolution algorithm. This linear convolution structure for FIR filter is used as a processing core to implement the subfilters of previously proposed parallel FIR filter structures. A large amount of hardware can be saved by the new scheme. For example, for a 576-tap FIR filter, when the parallelism level changes from 12 to 72, the new scheme can save 1755 to 3375 multiplications at the cost of 21 to 4658 additions and 1516 to 4749 delay elements, respectively.