Voltage reduction techniques for portable systems

Author

Chandrakasan, Anantha

Author_Institution

Dept. of Electr. Eng. & Comput. Sci., MIT, Cambridge, MA, USA

fYear

1997

fDate

7-10 Sep 1997

Firstpage

3

Lastpage

6

Abstract

Supply voltage scaling to 1 V and below is the key to low-power system design. Threshold voltage reduction enables aggressive supply scaling but increases leakage power. Emerging technologies such as MTCMOS and variable threshold bulk/SOI will be essential in controlling leakage while achieving high performance levels at low supply voltages. Power can also be reduced by adaptively varying the supply voltage in applications where the computational workload varies with time. Aggressive voltage and power level scaling requires efficient DC-DC conversion circuitry and in some cases, it is necessary to embed this function in the processor

Keywords

CMOS digital integrated circuits; power supply circuits; silicon-on-insulator; 1 V; MTCMOS; efficient DC-DC conversion circuitry; leakage power; low-power system design; multiple threshold CMOS process; portable systems; power level scaling; supply voltage scaling; threshold voltage reduction; variable threshold bulk/SOI; voltage reduction techniques; Circuits; Clocks; Computer applications; Costs; Low voltage; Power dissipation; Power supplies; Silicon; Threshold voltage; Voltage control;

fLanguage

English

Publisher

ieee

Conference_Titel

ASIC Conference and Exhibit, 1997. Proceedings., Tenth Annual IEEE International

Conference_Location

Portland, OR

ISSN

1063-0988

Print_ISBN

0-7803-4283-6

Type

conf

DOI

10.1109/ASIC.1997.616967

Filename

616967