• DocumentCode
    3544460
  • Title

    A bias-driven approach to improve the efficiency of automatic design optimization for CMOS OP-Amps

  • Author

    Cheng, Ya-Fang ; Chan, Li-Yu ; Chen, Yen-Lung ; Liao, Yu-Ching ; Liu, Chien-Nan Jimmy

  • Author_Institution
    Dept. of Electr. Eng., Nat. Central Univ., Jhongli, Taiwan
  • fYear
    2012
  • fDate
    10-11 July 2012
  • Firstpage
    59
  • Lastpage
    63
  • Abstract
    The equation-based analog design automation is getting popular in last decade to search the optimal solutions with good efficiency. However, due to the deep-submicron effects, significant modeling errors often exist in major transistor parameters like gds and gm. This often results in wrong prediction of circuit performance and leads to several redesign cycles to meet the specifications. Instead of building complex parameter models for gds and gm, this paper adopts the gm/Id design concept, which is an independent value to the device size, on equation-based optimization to solve the accuracy issue. Without the complex effects from W and L, the modeling accuracy of transistor parameters is significantly improved. No more iteration is required by using the proposed approach, which improves the efficiency as well as the accuracy. To the best of our knowledge, this is the first work that adopts the internal voltages instead of device sizes as the unknown variables to be solved. As demonstrated on several circuits with different objectives, both the accuracy and efficiency of circuit optimization can be improved significantly.
  • Keywords
    CMOS analogue integrated circuits; operational amplifiers; optimisation; transistors; CMOS op-amp; automatic design optimization; bias-driven approach; circuit optimization; deep-submicron effects; equation-based analog design automation; internal voltages; major transistor parameters; transistor parameters; Accuracy; Circuit optimization; Equations; Integrated circuit modeling; Mathematical model; Transistors; Analog circuits; Automatic design; Sizing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Quality Electronic Design (ASQED), 2012 4th Asia Symposium on
  • Conference_Location
    Penang
  • Print_ISBN
    978-1-4673-2687-2
  • Type

    conf

  • DOI
    10.1109/ACQED.2012.6320476
  • Filename
    6320476