DocumentCode :
3544534
Title :
Chip-level three-dimensional stacking for free-space optical interconnects
Author :
Ozguz, V.
Author_Institution :
Irvine Sensors Corp., Costa Mesa, CA, USA
fYear :
1998
fDate :
3-8 May 1998
Firstpage :
352
Lastpage :
353
Abstract :
Summary form only given. One way of reducing the size of the electronic hardware is through three-dimensional (3-D) packaging at the chip level. This approach reduces the length of the chip-to-chip interconnects by placing the neighboring chips in very close proximity to each other. Each chip in the stack communicates with its neighbors via electrical interconnects. Free-space optics provide the much-needed low-power global high-density interconnects to communicate between stacks. We show a schematic view of multiple 3-D electronic chip stacks interconnected via free-space optoelectronics. An array of microlasers and detectors are attached to each stack. The stacks communicate between each other via micro-optical components. 3-D packaging allows the overall system size to be small.
Keywords :
chip scale packaging; integrated circuit packaging; microlenses; optical interconnections; semiconductor laser arrays; 3-D electronic chip stacks; 3D packaging; chip-level three-dimensional stacking; electrical interconnects; electronic hardware; free-space optical interconnects; free-space optics; free-space optoelectronics; low-power global high-density interconnects; micro-optical components; microlaser array; neighboring chips; overall system size; Hardware; Laser transitions; Optical arrays; Optical interconnections; Optical pumping; Pump lasers; Semiconductor laser arrays; Sensor arrays; Solid lasers; Stacking;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Lasers and Electro-Optics, 1998. CLEO 98. Technical Digest. Summaries of papers presented at the Conference on
Conference_Location :
San Francisco, CA, USA
Print_ISBN :
1-55752-339-0
Type :
conf
DOI :
10.1109/CLEO.1998.676288
Filename :
676288
Link To Document :
بازگشت