Title :
High density ST-MRAM technology (Invited)
Author :
Slaughter, J.M. ; Rizzo, N.D. ; Janesky, J. ; Whig, R. ; Mancoff, F.B. ; Houssameddine, Dimitri ; Sun, J.J. ; Aggarwal, Suhas ; Nagel, K. ; Deshpande, S. ; Alam, Syed M. ; Andre, Torsten ; LoPresti, P.
Author_Institution :
Everspin Technol., Inc., Chandler, AZ, USA
Abstract :
We review key properties for commercial ST-MRAM circuits, discuss the challenges to achieving the many performance and scaling goals that are being addressed in current development around the world, recent results in the field, and present first results from a new, fully-functional 64Mb, DDR3, ST-MRAM circuit.
Keywords :
DRAM chips; MRAM devices; spin valves; ST-MRAM circuits; fully-functional DDR3; high density ST-MRAM technology; memory size 64 MByte; scaling goals; Electric breakdown; Integrated circuits; Magnetic tunneling; Magnetization; Materials; Switches; Transistors;
Conference_Titel :
Electron Devices Meeting (IEDM), 2012 IEEE International
Conference_Location :
San Francisco, CA
Print_ISBN :
978-1-4673-4872-0
Electronic_ISBN :
0163-1918
DOI :
10.1109/IEDM.2012.6479128
